Another issue is the integrity, or absence of noise of the delivered power. The designer needs to determine the number and location of decoupling capacitors and the goal is to save component cost and board area by avoiding over-conservative (excessive) use of bypass capacitors. The designer may also want to experiment with the PCB fabrication materials and stack-up to determine the best electrical and cost solution.

Obtaining impedance profiles of the power system network, analysis in the frequency domain (noise at various frequencies and resonant behavior), analysis in the time domain (noise at various points of time) and different isolation studies needs to be performed. For good decoupling design, studies need to be done on capacitor placement and selection (dielectric types, body sizes and values), via placement, capacitor landing pad design, ferrite bead selection and design and analysis of power islands / power splits.

By using high-speed design, analysis and verification techniques early in the design cycle, designers can eliminate layout iterations and ensure that products are marketed on time.